Technical background information on the DAC202 Firewire Interface
Firewire is a peer-to-peer protocol, meaning that every device on a Firewire network is equally capable of talking to every other device. Two video cameras on a Firewire network can share data with each other. A Firewire audio interface could save sound data directly to a Firewire hard drive. Your computer is just another peer on this network, and has no inherent special status.
Firewire is always implemented in hardware, with a special controller chip on every device. So the load it puts on your CPU is much lighter than USB communications load, and you're much less likely to lose any sound data just because you're running fifteen things at once. Specialized hardware usually makes things faster and more reliable, and this is one of those times.
But the real reason Firewire is more reliable than USB is more fundamental than that. It's because Firewire allows two operating modes. One is asynchronous, similar to what USB uses. The other is isochronous mode, and it lets a device carve out a certain dedicated amount of bandwidth that other devices can't touch. It gets a certain number of time slices each second all its own. The advantages for audio should be obvious: that stream of data can just keep on flowing, and as long as there isn't more bandwidth demand than the wire can handle (not very likely) nothing will interfere with it. No collisions, no glitches.
From a practical perspective, this also makes it safer to send a lot more audio via Firewire. That's why most of the multichannel interfaces (16 channels, 24 channels, etc.) are Firewire devices, and USB devices usually just send a two-channel stereo signal.
For hooking up your mouse, keyboard or thumb drive, USB is plenty fast and plenty cheap. For hard drives, either one will do (although Firewire is somewhat more reliable). For audio devices, USB will do fine if no other devices are competing with it and if you have processor room to spare. But Firewire will always be able to handle more load with lower latency and no glitches, because it has resources it can set aside to make sure your audio gets where it needs to go.
Jitter handling in the DAC202
The Jitter Elimination Technologies (JET) PLL on the chip used in the DAC202 feature state-of-the art jitter rejection abilities and extremely low intrinsic jitter levels.
Like all phase-locked loops, JET PLL use feedback to lock an oscillator to a timing reference. They track slow reference changes, but effectively free-run through rapid modulations of the reference (i.e. flywheel like). From a jitter transfer point of view, they provide increasing jitter attenuation above some chosen corner frequency.
Jitter attenuation is just one aspect of PLL design. Other considerations include frequency range and intrinsic jitter. It can be shown that conventional designs are bound by a fundamental tradeoff between these three aspects. For example, specifying a frequency range of one octave means using a low-Q oscillator. But that makes for high intrinsic jitter when the loop corner frequency is held down. Conversely, good jitter attenuation and low intrinsic jitter can be had by using a voltage-controlled crystal oscillator (VCXO). But the frequency range is then tiny. A further consideration is that only low-Q oscillators are easy to integrate on chip.
JET PLL sidestep the above-mentioned tradeoff. It incorporates two loops. One is largely or wholly numeric, and has its corner frequency set low enough to give good reference-jitter attenuation. The other regulates the analog oscillator and has its corner frequency set much higher, to moderate the intrinsic jitter. The two corner frequencies might be around 10 Hz and 100 kHz, for example.
Another benefit of having a high corner frequency in the analog loop is that interference, e.g. via the oscillator's supply rail, is more-effectively suppressed.
JET PLL requires a fast, stable, fixed-frequency clock. It is this that gives it stability in the band between the two corner frequencies. (Equally, in this band any jitter on this clock passes straight through to the JET PLL's clock output.) The stable clock is usually derived from a free-running crystal oscillator.
JET PLL contains a number-controlled oscillator, which can also be called a fractional frequency divider. Like the analog oscillator, this injects jitter. Typically, spectrum shaping is used to push most of that jitter up to frequencies where it will be heavily attenuated by the analog loop.
As well as frequency-locking the analog oscillator to the provided reference, JET PLL can also phase-lock an associated frame sync to the reference.
The JET PLL also allows clock “slew rate” to be controlled when the operating frequency is changing (e.g. 44.1kHz to 48kHz or when experiencing a clock source phase shift). With a slow slew rate, downstream equipment might not need to go into “unlock” state and back to lock state during such a shift.